A 2 Gb/s ∆Σ Directly Driven Wireless Link
نویسندگان
چکیده
One-bit ∆Σ modulation in a wireless transmitter is studied as a potential candidate for multifunction broadband transmit front ends. Characterizing a single ∆Σ modulated transmit element is the first step towards a transmit array for radar/communication applications. A wireless link directly driven by a 2 Gb/s ∆Σ bit sequence is analyzed through simulation and measurement. Effects of clock jitter, asymmetrical rise/fall edges and asymmetrical rise/fall times of the digital signal are studied. A Xilinx Virtex II-Pro FPGA is used to generate the ∆Σ bit sequences. The transmit and receive antennas simultaneously perform bandpass filtering of the noise in the ∆Σ spectrum.
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